Methodology Engineer

Are you ready to revolutionize the way IP and Systems are developed? We are in search of a dynamic and seasoned methodology engineer to join our Productivity Engineering Hardware team. In this role, you will lead efforts to enhance IP and System development processes, driving efficiency and enabling the timely delivery of top-notch products. We're looking for someone with a proven track record in streamlining workflows.

Join our innovative team dedicated to enhancing tools and workflows for creating IP and Systems globally. You'll be at the forefront of problem-solving, constantly challenged to devise creative solutions. Your successful solutions will be utilized by various teams, making a significant impact across our engineering organization.

High visibility and collaborative position with tremendous growth opportunities toward leadership
Enthusiastic and brilliant team of professionals
Competitive Compensation including industry-leading equity program
Employer paid benefits
Full 401K match
Outstanding work culture
Hybrid work schedule

Responsibilities:

• Take charge of developing and supporting inventive methodology solutions using Machine-Readable Specifications and automation.
• Create innovative and practical solutions for complex problems.
• Collaborate closely with solution architects and IP/system product teams to define, develop, and implement solutions.
• Develop solutions and features through Agile development processes, ensuring consistent high-quality outcomes.

Required Skills & Experience:

• A Bachelors or Master’s degree in Computer Science or Electrical/Computer Engineering
• 6-11 years of Semiconductor industry experience in the design, verification or automation of CPU, GPU, System IP, SoC.
• Experience in developing, testing, delivering, and maintaining software solutions
• Strong programming skills in Python, and scripting languages.

Desirable Skills and Experience:

• IP-XACT (IEEE-1685) awareness
• Good knowledge of both hardware and software domains
• Exposure to hardware synthesis flows